Efficient Path Delay Test Generation for Custom Designs
نویسندگان
چکیده
منابع مشابه
Efficient Path Delay Test Generation for Custom Designs
ETRI Journal, Volume 23, Number 3, September 2001 Due to the rapidly growing complexity of VLSI circuits, test methodologies based on delay testing become popular. However, most approaches cannot handle custom logic blocks which are described by logic functions rather than by circuit primitive elements. To overcome this problem, a new path delay test generation algorithm is developed for custom...
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ژورنال
عنوان ژورنال: ETRI Journal
سال: 2001
ISSN: 1225-6463
DOI: 10.4218/etrij.01.0101.0306